Senior Software Development Engineer (AWS ML), Machine Learning Israel (MLIL) — FLOW sub-team (Fleet Lifecycle & Operational Workflows)

Amazon

Amazon

Software Engineering, Data Science

Tel Aviv-Yafo, Israel

Posted on May 12, 2026

Description

Annapurna Labs designs silicon and software that accelerates innovation. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

The MLIL FLOW team is looking for a Senior Software Development Engineer to lead the design and delivery of systems software for our next-generation ML accelerator servers. We build production software to validate, initialize, monitor, and qualify these servers — from first silicon through fleet-scale deployment. We work on the physical systems that execute ML workloads: Server bring-up, hardware diagnostics, interconnect validation, power/thermal monitoring, and fleet-scale operations are our bread and butter.


Key job responsibilities
• Lead the architecture and implementation of hardware validation and diagnostic software for new ML acceleration platforms.
• Drive technical direction for PCIe validation, power/thermal diagnostics, and stress-testing frameworks that run across manufacturing, vetting, and production environments.
• Own subsystems end-to-end: from design through implementation, testing, deployment, and operational excellence at fleet scale.
• Work with Hardware, Manufacturing, EC2 teams to create coordinated software packages that enable both qualification and rapid deployment.
• Debug and root-cause complex hardware/software interaction failures on first silicon and production fleet returns; drive root-cause to closure.
• Build and maintain data pipelines, dashboards, and monitoring systems for fleet health and performance benchmarking.
• Mentor engineers, define best practices, drive design reviews, and raise the bar for the team.
• Lead multiple development initiatives in parallel, balancing schedule, risk, and technical quality across a fast-moving hardware program.


A day in the life
You'll start your day reviewing telemetry data from overnight fleet validation runs, identifying patterns that could indicate hardware issues. Your morning might involve leading a design review for a new PCIe validation framework with hardware engineers, then switching to hands-on debugging of a complex power management issue affecting production systems. Afternoons often bring cross-team collaboration sessions where you'll coordinate software delivery timelines with Manufacturing teams, followed by mentoring sessions with junior engineers on advanced debugging techniques.